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Twin Cobra PCB and Memory Map

Twin Cobra consists of 2 CPUs, one 68000 and one Z80. There is also a DSP (Texas Instruments TMS320C10NL) which does not serve much purpose other than to prevent bootlegging. In the case of Twin Cobra the DSP ROM is external which means it is a lot simpler to bootleg than Flying Shark that has an internal protected DSP ROM.

It has an OPL (Yamaha 3812) sound chip which is controlled by the Z80.

The PCB does not have specific markings for the data ROMs, the numbers in this document are the numbers on the stickers of the ROMs.

Click here for an image of a Twin Cobra PCB.

Click here for the Arcade Manual for Twin Cobra.

ROM contents

Sprite ROM:

ROM Sprite Graphics Bitkb
17
18
19
20
 0
 1
 2
  3 
 64
 64
 64
 64

Tileset ROM:

 ROM Layer Bit kb
06
07
08
09
10
11
12
13
14
15
16
0
0
0
1
1
1
1
2
2
2
2
0
1
2
0
1
2
3
0
1
2
3
 16
 16
 16
 32
 32
 32
 32
 64
 64
 64
 64

Program ROM:

 ROM Content kb
05
01
02
03
04
 Z80 Code
 68000 Odd Bytes Low
 68000 Odd Bytes High
 68000 Even Bytes Low
 68000 Even Bytes High
 32
 32
 32
 32
 32


Memory Maps

68000 Memory Map

 Start End Contents
 0x00000
 0x30000
 0x40000
 0x50000
 0x70000
 0x72000
 0x74000
 0x78000
 0x78002
 0x78004
 0x78006
 0x78008
 0x7800A
 0x7800C
 0x7E000
 0x7E002
 0x7E004
 0x7A000
 0x1FFFF
 0x33FFF
 0x40FFF
 0x50FFF
 0x70005
 0x72005
 0x74005










 0x7AFFF
 Program ROM
 RAM (first 34 bytes shared with DSP code)
 Sprite Table RAM
 Color RAM (Palette)
 Layer 0 Control Data
 Layer 1 Control Data
 Layer 2 Control Data
 DIP Switch 1
 DIP Switch 2
 Player 1 Joystick & Buttons
 Player 2 Joystick & Buttons
 Coin and Start Buttons
 Trigger TMS320C10NL DSP function
 Special Control Register
 Layer 0 Tile Index
 Layer 1 Tile Index
 Layer 2 Tile Index
 Odd bytes map to Z80 ram 0x8000-0x87FF

Note: addresses 0x7800x are word addresses where the only meaningful data is in the odd byte. Layer Tile Indexes are only accessible through 0x7X004 address and 0x7E00X data.

Special Control Register

DataTrigger
10
11
14
Layer 2 Use Tileset 0 (Lower data in tileset ROM)
Layer 2 Use Tileset 1 (Upper data in tileset ROM)
Enable Level 4 Interrupts

Layer Control Data Structure (16 bit words, 0x70000 - 0x74000)

IndexControl
 0
 2
 4
 Layer X position
 Layer Y position
 Tile Address (Read/Write Tile Index through 0x7e00x)


Sprite Control Data Structure (16 bit words, 0x40000-0x40FFF)

 Index Control
 0x00
 0x02
 0x04
 0x06
 Palette Index, Sprite Index
 Sprite Priority, Flip, Bank
 Sprite X Pos
 Sprite Y Pos


Layer and Sprite Ordering

 Depth Graphics
 Front




 Back
 Sprites priority 3
 Layer 0
 Sprites priority 2
 Layer 2
 Sprites priority 1
 Layer 1


Z80 Memory Map

Ports (See YM3812 documentation)

 Port Contents
00
01
16
64
80
OPL Port 0
 OPL Port 1 
Coin
DIP SW 1
DIP SW 2


Z80 Memory

 Start End Contents
 0x0000
 0x8000
 0x7FFF
 0x87FF
 Program ROM
 RAM (Shared with 68000)




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