New 10 February 2004.

Improvements in or relating to Microcomputers

Patent Number: WO8809573 
Publication date: 1988-12-01 
Inventor: James Westwood 
Applicant: Cambridge Computer Limited 

Abstract

WO88/09573                                  PCT/GB88/00388


Title Improvements in or relating to Microcomputers
----- ---------------------------------------------

This invention relates generally to microcomputers, which
term as used herein includes any device incorporating a
CPU and a memory means.

Background to the invention
---------------------------

Microcomputers are commonly provided with ports having
edge connectors enabling the attachment of peripheral
devices, including additional memory blocks for example.
In general, it is desirable for the microcomputer to be in
a "shut down" condition when a peripheral is being
attached or detached at the edge connector, for example to
avoid crashes leading to irretrievable loss of data.

It is therefore known to fit a microswitch adjacent the
edge connector, which may for example be actuated by
movement of a pivoted flap or the like, which microswitch
when actuated initiates a general shut down of the
computer.  In this way it is intended that a peripheral is
not attached and/or detached from the edge connector when
there is risk of loss of data or other harmful effects.

However, a general shut down of the microcomputer is not
achieved instantaneously on initiation thereof, and in
spite of actuation of the microswitch, it remains
necessary that the peripheral should not be attached
and/or detached before the general shut down procedure has
been completed.   It is therefore known to provide an
audible or other warning signal lasting for the duration
of the general shut down procedure, but if this signal is
ignored, for example due to lack of understanding or
impatience, data may be lost.

The invention
-------------

According to one aspect of the present invention, there is
provided a microcomputer having a CPU, a memory means and
an edge connector for attachment of a peripheral device,
in combination with a peripheral device having an array of
connectors for establishinq an electrical interconnection
between the microcomputer and the peripheral device at the
contact pads of the edge connector, wherein the said array
of connectors includes two connectors which are bridged so
as to short circuit two contact pads of the edge connector
prior to contact between any other connectors of the array
and their corresponding edge connector contact pads, on
insertion, or prior to contact between other connectors of
the array and the edge connector pads being broken, on
removal, and wherein the microcomputer is provided with
circuit means responsive to short-circuiting of said two
contact pads to initiate emergency shut down of the
microcomputer.

An emergency shut down of the microcomputer is an
instantaneous shut down analogous to that which may be
arranged to take place in the event of a power failure for
example. While not as satisfactory as a general shut
down in safeguarding data, it avoids risk of damage and
will usually save at least the more important data which
might otherwise be rendered irretrievable.

Preferably, the invention as above described is used in
conjunction with the known safety device incorporating a
microswitch which initiates the preferred qeneral shut
down procedure.   If the qeneral shut down procedure has
been completed when the peripheral device is attached or
detached, the subsequent initiation of an emergency shut
down will be pre-empted, or it can be arranged that the
circuitry in the microcomputer inhibits the emergency shut
down instruction if a general shut down has already been
completed.

The invention is especially applicable to a microcomputer
of the CMOS type and especially a microcomputer of this
type having one or more edge connectors enabling
attachment of additional memory blocks, also of the CMOS
type.

Especially but not exclusively in this type of computer,
it is often important to arrange for the application of
voltages to the additional memory block or other
peripheral device to he sequenced.

According to another aspect of the invention, therefore,
there is provided a peripheral device for a microcomputer
having a CPU, a memory means and an edge connector for
attachment of the peripheral device, which latter has an
array of connectors corresponding to the edge connector
contact pads, wherein the said connector array comprises
connectors of differing effective lengths automatically to
effect a required sequencing in the application or removal
of voltages to the different circuits incorporated in the
peripheral device when the latter is interconnected with
or disconnected from the microcomputer.

A preferred arrangement of the invention utilises the two
above-described aspects of the invention in combination.

In this case, the length of the bridged section of the two
connectors producing emergency shut down is preferably
such that the corresponding contact pads of the edqe
Connector remain short circuited until all the other
connector/contact pad interconnections have been
sequentially established, whilst said bridged section
terminates to open the said short circuit only after the
last of said connector/contact pad interconnections has
been completed, and vice versa.

In both aspects of the invention, it is preferably
arranged for the connectors of the array on the peripheral
to be of the same effective length mechanically.   This is
enabled by providing "dead" connector regions beyond the
"active" portions thereof at which electrical
interconnections are established. In this way it is
avoided that the contact pads of the edge connector are
undesirably abraded and/or worn when the peripheral
device, e.g. additional memory block, is being attached or
detached.

A preferred circuit provided in the microcomputer is a
gate circuit from which regularly occurring interrupt
(INT) and non-maskable interrupt (NMI) signals are fed to
the CPU.   The NMI siqnal is generated when the two
relevant contact pads of the edge connector, as hitherto
described, are short-circuited.   The NMI signal
terminates when the said short circuit is removed.

Description of embodiment
-------------------------

A microcomputer and peripheral device therefor are
exemplified in the following description, making reference
to the accompanying drawinqs, in which:-


Figure 1 is a perspective view of a microcomputer,
         in particular showing the peripherals port
  and edge connectors thereof and associated
safety device;


Figure 2a is a diagrammatic plan view of a micro-
         computer edge connector and a memory block
         circuit board adapted for connection to the
         microcomputer edge connector;


Figure 2b is an end view of the edge connector assembly,


Figure 2c is an end view of one of the contact pads of
         the edge connector of Figure 2b; and


Figure 3 is a diagram of an emergency shut down
         control circuit within the microcomputer.

Referring to Figure 1, a microcomputer 10 has edge
connectors 12 at the rear of a port into which peripherals
such as 15 can be inserted after opening a pivoted flap
14.

The latter controls a microswitch 17.  In known manner,
actuation of the microswitch when the flap is opened
initiates a general shut down of the microcomputer.  An
audible warning signal is generated for the duration of
the general shut down procedure.   It can also readily be
arranged that a general shut down is initiated by the
microswitch when a peripheral device such as a memory
block 15 is about to be detached from the edge connector.
In neither case, however, is attachment or detachment of
the peripheral device prevented while the general shut
down procedure is still taking place, if for one reason or
another the audible warning signal is ignored.

In accordance with the present invention, an instantaneous
emergency shut down of the computer is effected if general
shut down has not been completed prior to the act of
attaching or detaching an additional memory block.

Referring to Figure 2a, reference 20 denotes the contact
pads of the edge connector 14 of the microcomputer 10 and
reference 22 denotes the connectors of an array thereof
provided on a memory 24 (such as may be included within
the peripheral 15 of Figure 1) adapted for interconnection
with the microcomputer at said edge connector.

It can be seen that the connectors 22, whilst effectively
being of the same length mechanically, have isolated or
dead end regions 30 and active or live inner regions 32
which connect with the circuit board 24.   The active
reqions 32 of the connectors are of differing
appropriately pre-selected lengths, thereby to achieve a
desired sequencing of the voltages applied to the memory
block 24 when it is attached to the microcomputer, and
likewise in reverse sequence on disconnection.

It can also be seen that three connectors, collectively
referenced 40, are bridged together over their leading or
outer end regions, two of said three connectors having the
bridge continued over their inner regions.   The full
bridge over three connectors extends inwardly to a point
just inwards of the ends of the shortest active regions 32
of the other connectors 22.

The effect of the fully bridged region of the three
connectors is to short circuit two contact pads 50, 52 of
the contact pads 20 of the microcomputer edge connector 12
before any interconnections between the active regions of
any of the other connectors 22 and corresponding contact
pads 20 are established, when the memory block 24 is being
attached, and likewise before any such interconnections
are broken when the memory block is detached.

Figure 2b illustrates the edge connector housing 42 and
shows how by using appropriately shaped contacts,
conductive protrusions 44 cooperate to define a limited
conductive region for attaching the conductive connectors
22 of the board 24. One such contact 46 is shown in more
detail in Figure 2c.

Referring now to Figure 3, references 50, 52 again denote
the two contact pads of the edge connector of the
microcomputer which are temporarily short circuited during
the act of attaching or detaching the memory block.
Reference 54 denotes a third contact pad which provides a
ground connection 56 and is interconnected with the
contact pad 52. The three contact pads 50, 52, 54
correspond to the three connectors 40 of the memory block
circuit board 24 hitherto identified with reference to
Figure 2.

Immediately contact pads 50, 52 become short circuited, a
gate array circuit 60, from which regularly occurring
interrupt (INT) signals are fed to the CPU 62, is caused
to supply a non-maskable interrupt (NMI) signal to the
CPU, initiating an instantaneous emergency shut down of
the microcomputer.   The normal INT signal is inhibited
for the duration that the contact pads 50, 52 are short
circuited; this is to prevent the regular interrupts from
reactivating the system for the duration of the short
circuit.

It is thereby ensured that the microcomputer is in a shut
down condition, as necessary to avoid crashing with loss
of valuable data and possible other damage, prior to the
establishment or separation of any of the other
connector/contact pad interconnections via which the
memory block is operationally connected with the
microcomputer.   This safe condition is assured, even if
the general shut down procedure described with reference
to Figure 1 has not been completed.

It will he seen that on removal, the reverse procedure
results and the bridged pair 40 again short the
corresponding pair of contacts 50, 52 before the remaining
contacts break from the other connectors of the assembly
22.

Various modifications of the above-described arrangement
are possible within the scope of the invention
hereinbefore defined.   In this regard, it is again to be
appreciated that the invention is applicable to
microcomputing devices such as those employed in automatic
machines, e.g. washing machines, in which an operational
programme is determined by a programmed circuit block
inserted into an edge connector provided on said
microcomputing device.

CLAIMS
------

1.  A microcomputer having a CPU, a memory means and an
edge connector having contact pads for attachment of a
peripheral device, in combination with a peripheral device
having an array of connectors for establishing an
electrical interconnection between the microcomputer and
the peripheral device at the contact pads of the edge
connector, characterised in that the said array of
connectors includes two connectors which are bridged so as
to short circuit two contact pads of the edge connector
prior to contact between any other connectors of the array
and their corresponding edge connector contact pads, on
insertion, (or prior to contact being broken between other
connectors of the array and the edge connector pads, on
removal), and wherein the microcomputer is provided with
circuit means responsive to short-circuiting of said two
contact pads to initiate emergency shut down of the
microcomputer.

2.  A microcomputer as claimed in claim 1 further
characteriSed by a microswitch which initiates a general
shut down procedure in the event that the peripheral
device is removed.

3.  A microcomputer as claimed in claim 1 or 2 in which
the application of voltages to the peripheral device has
to follow a particular sequence, characterised in that
connectors in the array are of differing effective lengths
automatically to effect a required sequencing in the
application or removal of voltages to the different
circuits incorporated in the peripheraldevice when the
latter is interconnected with or disconnected from the
microcomputer.

4.  A microcomputer as claimed in claim 3 characterised in
that the length of the bridged section of the two
connectors producing emergency shut down is such that the
corresponding contact pads of the edge connector remain
short circuited until all the other connector/contact pad
interconnections have been sequentially established, and
said bridged section terminates to open the said short
circuit only after the last of said connector/ contact pad
interconnections has been completed, and vice versa.

5.  A microcomputer as claimed in any of the preceding
claims characterised in that the connectors of the array
on the peripheral are of the same effective length
mechanically, and include "active" connector regions and
"dead" connector regions, beyond the "active" portions
thereof, at which electrical inter-connections are
established.

6.  A microcomputer as claimed in any of the preceding
claims further characterised by a gate circuit from which
regularly occurring interrupt (INT) and non-maskable
interrupt (NMI) signals are fed to the CPU, and the NMI
signal is generated when the two relevant contact pads of
the edge connector are short-circuited and terminates when
the said short circuit is removed.

7.  A microcomputer and peripheral device constucted
arranged and adapted to operate substantially as herein
described with reference to the accompanying drawings.

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